---------------------------------------------------------------------------------
  -- Design Name : Stack
  -- File Name   : ExMemStack32_1024.vhd
  -- Function    : Stack for 32b values, size 1KW
  -- Authors     : Mirko Francuski  2006/0225
  --               Milos Mihajlovic 2006/0039
  -- School      : University of Belgrade
  --               School for Electrical Engineering
  --               Department for Computer Engineering and Information Theory
  -- Subject     : VLSI Computer Systems
---------------------------------------------------------------------------------

library ieee;

use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_signed.all;
use ieee.numeric_std.all;
use work.UserPkg.all;

entity ExMemStack32_1024 is
  port (
    clk     : in    std_logic;
    cl      : in    std_logic;
    push    : in    std_logic;
    pop     : in    std_logic;
    dataIn  : in    word32;
    stackV  : out   std_logic;
    dataOut : out   word32 := (others => '0')
  );
end ExMemStack32_1024;

architecture behavioral of ExMemStack32_1024 is

  signal ov, uv     : std_logic;
  signal sp         : word32;
  signal err        : word32;
  signal stackSize  : word32;
  
begin
  
  spReg : GenRegExt32 port map (
    clk     => clk,
    cl      => cl,
    ld      => '0',
    inc     => push,
    dec     => pop,
    regIn   => (others => '0'),
    regOut  => sp
  );
  
  spMem : ExMemMemory port map (
     clk     => clk,
     we      => push and not ov,
     addr    => sp(LEN_SP-1 downto 0),
     dataIn  => dataIn,
     dataOut => dataOut
  );

  err       <= (others => '1');                   --  -1
  stackSize <= (LEN_SP => '1', others => '0');    -- 256
  
  uv        <= '1' when sp = err      else
               '0';
  ov        <= '1' when sp = stackSize else
               '0';               
  
  stackV <= uv or ov;

end architecture behavioral;

